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Practice Exam 1 - Advanced Digital Systems | El E 385, Exams of Electrical and Electronics Engineering

The University of Mississippi (Ole Miss)Electrical and Electronics Engineering

Material Type: Exam; Class: Advanced Digital Systems; Subject: Electrical Engineering; University: University of Mississippi Main Campus; Term: Fall 2003;

Typology: Exams

Pre 2010

Uploaded on 09/02/2009

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EL E 385 Test 1 Fall 2003
Closed Book: No references allowed.
1. (10 points)
Explain the logical operation of the symbol drawn below. That is, give the
output, y, in terms of the inputs x and ENB.
2. (15 points)
a) Shown below is the symbol for a Dual 4-line to 1-line data
selector/multiplexer with 3-state outputs. Show the connections that will make
this an 8-line to 1-line data selector/multiplexer. Label the inputs and outputs.
b) Circle the input signal line that would be selected when the address is 1102.
3. (15 points)
Use the data sheet for the Dual 4-line to 1-line data selector/multiplexer
with 3-state outputs to find the fan-out when one SN74LS253 drives other
SN74LS253's. Show your work.
pf3
pf4
pf5

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Download Practice Exam 1 - Advanced Digital Systems | El E 385 and more Exams Electrical and Electronics Engineering in PDF only on Docsity!

EL E 385 Test 1 Fall 2003 Closed Book: No references allowed.

  1. (10 points) Explain the logical operation of the symbol drawn below. That is, give the output, y, in terms of the inputs x and ENB.
  2. (15 points) a) Shown below is the symbol for a Dual 4-line to 1-line data selector/multiplexer with 3-state outputs. Show the connections that will make this an 8-line to 1-line data selector/multiplexer. Label the inputs and outputs. b) Circle the input signal line that would be selected when the address is 110 2.
  3. (15 points) Use the data sheet for the Dual 4-line to 1-line data selector/multiplexer with 3-state outputs to find the fan-out when one SN74LS253 drives other SN74LS253's. Show your work.
  1. (20 points) Shown on the attached data sheets are the function table and two alternative symbols for a dual 2-line to 4-line decoder which can also be used as a dual 1-line to 4-line demultiplexer*. Complete the VHDL description of this chip. library ieee, lcdf_vhdl; use ieee.std_logic_1164.all entity dual_demux is port(Gate1, In1, Gate2, In2: in std_logic; Address: in std_logic_vector(1 downto 0); 1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3: out std_logic); end dual_demux; architecture a of decoder_2_to_4 is end a;
  1. (15 points) For the options given below write Static if the condition applies to static RAM, write Dynamic if the condition applies to dynamic RAM, write Both if the condition applies to both static and dynamic RAM, and write Neither if the condition applies to neither type of RAM. _____ Holds values even with no power applied to the chip _____ Holds values until the chip select line goes to a logical '0' _____ Holds values as long as power is applied to the chip _____ Loses the value while power is applied unless the memory is "refreshed" In the statement below, circle the RAM types that make the statement true. (Static) (Dynamic) RAM is faster than (Static) (Dynamic) RAM
  2. (10 points) From the block diagram of a Read-Only memory shown below a) How many words of memory can the ROM hold? b) How large is each word of memory? c) Is the ROM enabled with a 5-volt signal or a 0-volt signal?

*Note: A decoder with an enable can be used as a demultiplexer because the enable line is combined with each minterm generator in a decoder). By putting a signal on the enable line, it is connected to each minterm generator and the signal will then pass through to the output only for the minterm that is selected.