Download New to the 68HC11 Microcontroller - Lecture Notes | TECH 64012 and more Study notes Biotechnology in PDF only on Docsity!
New to the 68HC11….
At this point we should discuss the major enhancements made to the 68HC11 over the familiar 6800, particularly those Dealing with the CPU registers and to the instruction set, which would make the programming of the chip much easier.
Added Registers:
Two new registers were added:
Accunulator D and Index Register Y Both are 16-bit registers
Accumulator D
This 16-bit accumulator mirrors ACCA & ACCB The Most significant byte ( MSB ) will have the content of ACCA, the LSB will have the content of ACCB. Instructions affecting it are : LDD, ADDD, LSRD, ASLD etc…
Please note that ACCD mirrors automatically ACCA,ACCB and the opposite is also true. For example, if ACCA, ACCB were initially loaded with $AA, $BB, following the instruction LDD #$0000 would cause ACCA, ACCB to both have 00.
Y Index register
This added 16-bit register is identical to the familiar X register. Instructions like LDY, INY, DEY, INY etc… acts exactly like the X register instructions LDX, INX, DEX, INX etc…
Added instructions
In addition to the numerous added instructions dealing with Accumulator D and the Y undex register, there are several instructions which were added to increase the power of the 68HC11.
I will list here the ones affecting our programming the most in the Arithmetic type instructions And in the Relative type branching instructions.
Arithmetic type instructions: MUL ( multiply 8X8 ) IDIV ( Integer divide 16 by 16 ) FDIV ( Fractional divide 16 by 16 )
Week 2 Course Notes
Relative type branching instructions: BSET ( Branch if bit(s) set ) BRCLR ( Branch if bit(s) clear ) BSET ( Set Bit(s) BRN ( Branch never )
In the following sections we will review in detail INSTRUCTION DESCRIPTIONS as well as INSTRUCTION CLASSIFICATIONS for the 68HC11 microcontroller. You will also be given illustrative examples on the major instructions.
1.0 INSTRUCTION DESCRIPTIONS
A description of each of the 68HC11 MPU instructions is provided M68HC11 Reference Manual ( RM ). Rather than spending a lot of time on each instruction review, I will provide examples dealing with the instructions we will be dealing with this and the following week.
EXAMPLE 1.
Find the op codes for the assembly language instructions ADDA #$34, ADDB #$
Solution: Look for the mnemonic ADD. The table below the description of this mnemonic gives information for both the ADDA and ADDB instructions. The ADDA and ADDB instructions each have five possible address modes. We are interested immediate mode because of the # in the assembly language instructions. From the table entry for the IMMediate address mode, we find that the op code for ADDA (IMM) is 8B. Thus, the instruction ADDA #$34 will assemble into the two bytes, 8B 34.
Similarly, we find that the op code for ADDB (1MM) is CB. Thus, ADDB #$ assembles into the two bytes, CB 34.
EXAMPLE 1.
Convert LDX $2000 and LDY $2000 into machine language code.
Solution: These instructions use the extended mode to load data into the X and Y registers. Look for mnemonic LDX and find the table entry for the EXTended address mode. The op code for LDX (EXT) is specified as FE. Thus, LDX $2000 is assembled into FE 2000.
Likewise, look for mnemonic LDY and find the table entry for the EXTended address mode. The op code for LDY (EXT) is specified as 18 FE. The LDY instruction is one of those 68HC11 MPU instructions that takes two bytes to express: a prebyte, 18, and the
EXAMPLE 1.
Which flags in the MPU's condition code register (CCR) are affected by the execution of the instruction LDAA #$A5?
Solution: Look for the mnemonic LDA and find the table entry for LDAA (IMM). The table shows that the N and Z flags will be affected by the data that are being loaded into accumulator A; this is indicated by the ** under the N and Z columns in the table. In this case, the date are A5 16 =10100101 2. Since the data are not equal to zero, the Z flag will be cleared to 0. The N flag will be set to 1 because the sign bit (MSB) of the data is 1.
The table also shows that the V flag will be cleared to 0 whenever this instruction is executed, regardless of the data.
EXAMPLE 1.
Repeat for LDX #$00A5.
Solution: Look for the mnemonic LDX and find the table entry for LDX (IMM). As in the previous example, the table shows that the N and Z flags “will be affected by the data that are being loaded into the 16-bit register X; again, this is indicated by the ** under the N and Z columns in the table. In this case, the data are 00A5 16 = 00000000101001012 Since these data are also not equal to zero, the Z flag will be cleared to 0. In contrast to the previous example, the N flag will be cleared to 0 because the sign bit (MSB) of the data is a 0.
The table also shows that the V flag behaves the same way as in the previous example; it’s always cleared to 0.
1.1 PROGRAM LISTING FORMAT
The following sections of this chapter contain many programming examples to illustrate the 68HC11 MPU instruction set. The program listings use the format shown in the example program below.
Address Label Inst. Code Mnemonic Comments 2100 START 86 LDAA #$D6 ; Load ACCA with data 2101 D 2102 B7 STAA $2000 ; Store data in 2000 2103 C 2104 00 2105 END 3E WAI ; Halt execution
The first column lists the hexadecimal memory addresses where the program bytes are stored. The second column is used to give labels or names to some of these address locations. For example, location 2100 is given the label START to indicate that it is the first address in the program and address 2105 is given the label END to indicate that it is the last instruction in the program. For our purposes here, the labels are not a necessary part of the program, but are just a convenient way to refer to certain steps in a program or certain data storage locations. If we were writing programs that were to be assembled by a full-blown assembler, these labels would actually be part of the program, and they could be used in place of actual numerical addresses. The AS11assembler, provided free of charge by Motorola to users of the 68HC11 MPU, is an example of a full-blown assembler.
The third column gives the hexadecimal instruction codes. These codes represent the actual binary patterns that are stored in the program memory (i.e., it is the machine language object program.
The fourth column gives the assembly language mnemonic together with the operand address or operand (immediate mode). The fifth column includes explanatory comments that will help you to follow the program. These comments are not only a help to someone who is reading someone else’s program, but they also allow the programmer to keep track of the program logic during the writing of the program. Comments always begin with a semicolon (;)
1.3 INSTRUCTION CLASSIFICATIONS
It is difficult to group the 68HC11 MPU instructions, or any microprocessors for that matter, into distinct classifications because some instructions will fit into more than one category, and some specialized instructions defy classification. Nonetheless, we briefly describe some of the broad instruction classifications. Keep in mind that our choice of 68HC11 MPU instruction categories is not unique, and probably would not meet with unanimous agreement. We are doing it simply as a way to have a convenient hook on witch to hang each instruction.
Condition Code Register Instructions This group of instructions contains those used to set and clear some of the flags in the CCR.
Register-Memory Transfers This group of instructions contains those in which data are transferred from an MPU register to memory (i.e., store operations) or form memory to an MPU register (i.e. load operation). Of course, these data transfers can also take place between an MPU register and input/output devices. There are no data transfer instructions that directly transfer data from one memory location to another.
The CLV and SEV instructions are not used as often as the other six. The CLI, SEI, and TAP instructions are used to control the MPU's response to certain types of interrupts IRQ and XIRQ) and to set or clear the S flag.
1.5 REGISTER TO MEMORY TRANSFER INSTRUCTIONS
The 68HC11 MPU can execute twelve different instructions that transfer data between one of its registers and a memory location (or I/O device). The LDAA, LDAB, LDD, LDS, LDX, and LDY instructions are used to load data from memory (or an input device) into accumulator A, accumulator B, double accumulator, stack pointer register SP, index register X and index register Y, respectively. The STAA, STAB, STD, STS, STX, and STY instructions are used to respectively store the contents of the accumulator A, Accumulator B, double accumulator, stack pointer register S, index register X, and index register Y into a memory location (or output device). Each of these instructions can use several address modes. Refer to Appendix A for the available address modes, the op codes, and other information pertaining to each of these instructions.
The PSHA, PSHB, PSHX, and PSHY instructions are used to push the contents of ACCA, ACCB, X, and Y onto the stack at the address specified by the stack pointer register (SP). The PULA, PULB, and PULY instructions will pull data off the top of the stack and load them into ACCA, ACCB, X, and Y respectively.
EXAMPLE 1.
Study the short program below and determine the contents of ACCA, ACCB, ACCD, and the N and Z flags at the completion of the program.
Address Label Instruction Mnemonic Comments Code
2000 START 86 LDAA #$D7 ; Load ACCA with data 2001 D 2002 97 STAA $27 ; Store ACCA in memory 2003 27 2004 D6 LDAB $27 ; Load ACCB from memory 2005 27 2006 END 3E WAI ; Halt execution
Solution The first instruction LDAA #$D7 uses the immediate address mode to load the data D7 into ACCA. The second instruction, STAA $27, uses the direct address mode to store ACCA into memory location 0027 16.
The third instruction loads ACCB with the data from address 0027. The last instruction, WAI, essentially halts the MPU. The following table summarizes the status of the pertinent MPU registers, flags, and memory locations after the execution of each
instruction.
Instruction Status after execution LDAA #$D7 [ACCA] = D7 16 =11010111 2 : N=1, Z= STAA $27 [$0027] =D7 16 =11010111 2 : N=1, Z= LDAB $27 [ACCB] = D7 16 =11010111 2 : N=1, Z=0: [ACCD] =D7D WAI no changes
EXAMPLE 1. The program below stores the contents of the ACCA and ACCB onto the stack, and then later restores them into ACCA and ACCB. Determine the addresses on the stack where the contents of ACCA and ACCB were stored and explain how the stack pointer (SP) in incremented and decremented during the execution of the program.
Address Label Instruction Code Mnemonic Comments
2000 START 8E LDS #$01FF ; Load SP 2001 01 2002 FF 2003 36 PSHA ; Push ACCA onto the stack 2004 7 PSHB ; Push ACCB onto the stack : : : : 2010 33 PULB ; Pull ACCB from the stack 2011 32 PULA ; Pull ACCA from the stack 2012 END 3E WAI ; Halt execution
Solution: The LDS #$01FF instruction uses the immediate address mode to load the stack pointer (SP) with 01FF. Recall that the SP is a 16-bit registers, so that two successive bytes have to be specified after the op code. The PSHA instruction pushes {ACCA} into the memory location specified by [SP] =01FF and then automatically decrements [SP] to 01FE. The PSHB instruction pushes [ACCB] into the memory location specified by [SP] =01FE and then automatically decrements [SP] to 01FD. Thus, at this time, ACCA is stored in location 01FF and ACCB in location 01FE. Sometime later a PULB instruction is executed which automatically increments the [SP] from 01FD back to 01FE and then transfers the contents of memory location 001FE back into ACCB. Next, a PULA instruction is executed which again automatically increments the [SP] back to 01FF and then transfers the contents of memory location 01FF back into the ACCA. Finally, the WAI instruction is executed which halts the MPU from executing any more instructions.
1.6 REGISTER-TO-MEMORY TRANSFER INSTRUCTIONS
The 68HC11 MPU has ten different instructions that transfer data between its various registers.
Function Mnemonic Op Code
Instruction Address Label Code Mnemonic Comments 2000 START 30 TSX ; Transfer [SP] to [X] 2001 A6 LDAA $00,X ; Load ACCA from address 2002 00 ; specified by [X] 2003 END 3E WAI ; Halt execution
To analyze this program, let's assume the [SP] =206B. The SP is pointing at address 206B, which is the next available location on the stack; address 206C is the top of the stack, where the last data were pushed on the stack. This is illustrated below. Stack [SP] ----> 206B ??? 206C Data <---top of stack 206D Data 206E Data 207F Data
The TSX instruction transfers [SP] to [X] and then increments [X]. At the end of this instruction, then, [X] =206B + 1 =206C. The LDAA $00, X instruction uses the indexed address mode to load ACCA from the address given by [X], because the offset is 00. Since [X] =206C, data will be taken from this address and loaded into ACCA. Thus, data have been taken from the top of the stack ($206C) without affecting the SP.
1.7 ARITHMETIC INSTRUCTIONS
Unlike the 68HC11 MPU, most 8-bit MPUs have arithmetic instructions that are limited to addition and subtraction. Although this might appear to be a severe limitation, it really is not. The other arithmetic operations (multiplication, division, square roots, trigonometric functions, etc.) can be performed by sequences of instructions called subroutines that use addition and subtraction together with other instructions. Programmers have developed subroutines for all the common arithmetic operations, and these subroutines can be placed in memory and used over and over. We will say much more about subroutines later.
The 68HC11 MPU has thirteen different types of arithmetic instructions. Each of these performs an arithmetic operation on two operands. For six of these instruction types (ADD, ADDD, ADC, SUB, SUBD, and SBC) one of the operands comes from memory and the other form one of the accumulators. For three of these instruction types (ABA, SBA, MUL) one of the operand comes from accumulator A and the other from accumulator B. For two of these instructions types (ABX and ABY) one of the operands comes from accumulator B and the other from either one of the index register X or Y. And, for two of these instruction types (IDIV and FDIV), one of the operands comes from the double accumulator and the other from the index register X.
ABA --ADD Accumulator B to Accumulator A
This instruction, as described in Appendix a, adds the contents of ACCB to ACCA and places the result in ACCA. The result will affect the H, N, Z, V and C flags.
Recall that the ALU does not know whether the two operands are signed or unsigned numbers; only the programmer knows that. The ALU adds the two 8-bit numbers as if they were unsigned numbers.
To illustrate, let's assume that [ACCA] =01000101 2 =69 10 and [ACCB]=00110010 2 = 50 10. The ALU will add these two numbers as shown below.
01000101 2 =69 10 <----[ACCA}
- 00110010 2 =50 10 <----[ACCB] 01110111 2 =119 10 ---->result placed in [ACCA]
The addition does not produce a carry from bit 7 (MSB) position. Thus, the MPU will make C=0. The H flag is affected only by arithmetic additions of 8-bit operands. Whenever there is a carry-out from bit position 3 into bit position 4, the MPU will make H=1. Therefore, in this example H=0. Since the result is not exactly zero, the MPU will make Z=0. The MPU will also make N= 0 since the N flag takes on the value of the sign bit of the result (even if signed numbers are not being used).
The overflow flag, V, will be cleared to 0 because the sign bit of the result is the same as the sign bits of two operands. Recall that the V flag is used to indicate an overflow into the sign bit position when signed numbers are added or subtracted.
ADDA/ADDB/ADDD--Add Memory to the Accumulator The ADDA and ADDB instructions are used to add a data byte from memory to one of the accumulators (ACCA, ACCB), with the result placed in the accumulator. The ADDD instruction is used to add the bytes of data from the double accumulator (ACCD) with two bytes of data from two consecutive memory locations specified by an operand address. The result is placed back into the double accumulator. The N, Z, V, and C flags are affected by the result. The H flag is affected by the instructions ADDA and ADDB; however, it is not affected by the ADDD instruction since it involves 16-bit operands. Each of these instructions can use several address modes as described in Appendix A.
ADCA/ADCB--Add Memory to Accumulator with Carry These instructions are similar to the ADDA and ADDB instructions except that the C flag participates in the addition operation. For example, the ADCA instruction adds the operand from memory and the C flag to the contents of accumulator A. The following two cases illustrate the ADC instruction. In the first case, we will assume C=1 prior to the ADCA operation.
00111010 2 <------Operand from Memory [M] 00100101 2 <-------[ACCA]
- 1 2 <-------C flag 01100000 2 -------->result placed in [ACCA]
Start
Load ACCB with input port at address C
Subtract ACCB from ACCA
Add the byte 3C to ACCA
Subtract contents of memory location C
[ACCA]---
[ACCB]
END
Load ACCA from input port at address C
1 00000100 2 ------> result placed in [ACCA]
Here, the addition of the 2's complement of [ACCB] to [ACCA] produces a carry-out of bit
- This will always happen when a number is subtracted from a larger or equal number. The MPU, however, will make C=0 to indicate that no borrow has occurred. In other words, the MPU complements (inverts) the C flag to indicate the borrow status.
Now let's assume that [ACCA] =00000101 2 =5 10 and [ACCB]=00001001 2 =9 10. The SBA operation is shown below.
00000101 2 <-----[ACCA]
- 11110111 2 <-----2's complement of [ACCB] 11111100 2 ------>result placed in [ACCA]
In this case, there in no carry out of bit 7. This will always happen when a umber is subtracted from a smaller number. The MPU will set C=1 to indicate that a borrow has occurred. The borrow is used in a multibyte subtraction operation.
SUBA/SUBB--Subtract Memory from Accumulator These instructions are used to subtract a memory data word from one of the accumulators with the result placed in the accumulator. The N, Z, V, and C flags are affected in the same way as for the SBA instruction.
EXAMPLE 1. Figure 1.0 is the flowchart for a program that performs several addition and subtraction operations. Write a program for this flowchart.
Solution: The program is shown below starting at address 2000.
Address Label Inst. Code Mnemonic 2000 START B6 LDAA $ 2001 30 2002 00 2003 D6 LDAB $ 2004 10 2005 10 SBA 2006 8B ADDA #$3C 2007 3C 2008 B0 SUBA $ 2009 36 200A 82 200B 16 TAB 200C END 3E WAI
Figure 1.0 Flowchart for Example 1.
Examine this program carefully and note how each instruction corresponds to one of the blocks in the flowchart. Also check the address modes and op codes used for each instruction.
SBCA/SBCB--Subtract Memory from Accumulator with Carry These instructions will subtract a memory data byte and the C flag form one of the accumulators. To illustrate, assume that [ACCB] =28 16 and the data word stored in memory location 2050 is 12 16. Also assume that C = 1. When the MPU executes the instructions SBCB $2050, it will subtract [2050] and the C flag from [ACCB] as shown below. All values are hexadecimal.
28 [ACCB] -12 [2050] -1 C flag 15 -->Result placed in ACCB
The SBC instructions are used only when multibyte subtractions are performed, and the C flag represents the borrow generated by subtraction of lower-order bytes.
DAA--Decimal Adjust the Accumulator A
This instruction is used only after two BCD-coded operands are added and the result placed in accumulator A. The ALU adds the two operands as if they were straight binary numbers, and the binary result is placed in ACCA. The DAA instruction can then be used to convert the result in ACCA to correct BCD form. To illustrate, assume [ACCA]=01000110 (BCD) =46 10 , and [ACCB] =00100111 (BCD) =27 10. Execution of he ABA instruction proceeds as follows:
0100 0110 [ACCA]
- 0010 0111 [ACCB] 0110 1101 ----->result placed in ACCA
The result is not in correct BCD form. It can be converted to correct BCD by execution of a DAA instruction. The DAA instruction will correct it by adding 0110 to the [ACCA] as shown below.
0110 1101 [ACCA] after ABA instruction
7 3 --->correct BCD placed in ACCA
The DAA instruction can be used to follow any addition instruction that places the result in ACCA. In other words, there are three possible instruction sequences that can be used for adding operands that represent BCD-coded data; these are ABA, DAA; ADDA, DAA; and ADCA, DAA. You can consider these pairs of instructions as performing the operation of adding BCD numbers and producing BCD results.
The DAA instructions cannot be used with ACCB, and it cannot be used for BCD subtraction.
MUL--Multiply Accumulator A by Accumulator B
The MUL instruction multiplies an 8-bit unsigned binary value in accumulator A (ACCA) by the 8-bit unsigned binary value in accumulator B (ACCB) and places the 16-bit unsigned product in the double accumulator (ACCD). The C flag is set if bit 7 of the result (bit 7 of ACCB) is set. The C flag is useful whenever rounding of the most significant byte of the product is desired. If the C flag is set after the MUL instruction is executed, it means that the lower byte (ACCB) of the result if greater than 0.5 (assuming multiplication of mixed numbers). IN such cases, we may choose to round the most significant byte (ACCA) of the product by executing the sequence: MUL, ADCA #$00. This program sequence will add 1 to the most significant byte of the product (ACCA) if the C flag is set due to the execution of the MUL instruction.
