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A comparison of Algorithms R and F in terms of convergence rates and multiplication requirements. It includes sequence diagrams, examples, and simulation results for both algorithms. The document also discusses the organization of Algorithm R for rapid division and square root performance.
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(ACCtSSION NISMBEn) (^) (THRUFI
.....U - ) (^) NATIONAL (^) TECHNICAL- INFORMATION U Seporgmen (^) of (^) SERVICE EVmCE - Springfield_ (^) VA (^22151) -
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The (^) subject for this research was suggested by Professor C. V. Ramamoorthy. (^) In addition, Professor Ramamoorthy provided invaluable (^) assistance by his guidan and encouragement. (^) He made many suggestions which were of great help and for this the author wishes (^) to express his sincere (^) thanks. The author wishes to thank (^) Professor C. H. Roth, Jr.,. for his (^) helpful suggestions and interest as a member of the committee. The author also appreciates the guidance (^) rendered by Professor (^) David M. Young, Jr., in the convergence proofs.
J' R. G.
August, 1969
iii.
The hardware algorithms^ are^ presented^ which^ utilize high-speed multiplication^ and^ no^ division^ to^ perform^ the square root^ operation^ rapidly.^ One^ algorithm^ is^ intended for a large general-purpose computer^ and^ in^ addition^ pro vides a second-order division^ scheme.^ The^ second^ al gorithm requires^ a-special^ function^ generator^ which^ is presently utilized in^ certain^ existing^ computers.^ Each algorithm is considered^ for^ convergence^ rate,^ variance, accuracy and implementation. The^ effect^ and^ importance of the initial^ approximation^ is^ considered.^ A^ simulation is performed to^ compare^ each^ to^ a^ conventional^ algorithm. Although both algorithms are^ intended^ strictly^ for^ hard ware implementation,^ either^ may^ find^ an^ application^ using microprogramming, and^ under^ certain^ conditions,^ one^ might be implemented in^ software.
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- 7.4 Round-off Error 7.3 Variance 6o Table Page 7-1 Maximum Number of^ Iterations^ Required^ to Generate Square^ Root^ with^ an^ 8-bit
7-2 Maximum^ Number^ of^ Iterations^ Required^ to Generate Square Root with a 2-bit Initial Approximation .............. 61 7-3 Maximum Number of Multiplications Required toInitial Generate Approximation Square Root ....... with^ an^ 8-bit .... 62 7-4 Maximum Number^ of^ Multiplications^ Required to Generate Square^ Root^ with^ a^ 2-bit Initial Approximation .......... 62
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Figure Page 5-1 Sequence (^) Diagram for Algorithm-F 38
5-3 Minimum Number of Significant Bits (^) vs. ErrorIteration Number^ with^ Initial^ Relative Reciprocal)Fj^ - Generator^ I^ for^ Four Accuracy^ Values ..^ of 45 6-1 Flow Chart for Simulation of Algorithm F (^50) 6-2 Number of Multiplications (^) for a 20-bit ApproximationNumber^ vs.^ Accuracy........^ of^ Initial ....... 52 6-3 (^) Number of Multiplications for a 32-bit NumberApproximation vs. Accura,cy ............... of Initial 53 6-4 Number of Multiplications for a 48-bit Number Approximation vs. Accuracy .... of (^) .......... Initial 54 6-5 Number of Multiplications for a 64-bit NumberApproximation vs. Accuracy ............... of Initial 55 6-6 Number (^) of Multiplications for a 92-bit NumberApproximation vs. Accuracy ............... of Initial 56 7-1 (^) Calculated MinimuM Number of Significant BitsMultiplications of B vs. Number for Algorithmsof Iterations F and and R 58 8-1 Data Flow (^) for Algorithm R. 66 8-2 Data Flow for (^) Algorithm F ......... 70 9-1 Sequence (^) Diagram for Algorithm R Using Two Multipliers (^) ................ (^77)
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l a r g e , f o u r t h - g e n e r a t i o n s c i e n t i f i c machines. [ I ] , [ 3 ]
t h e CDC 6600, SDS 930, and t h e Honeywell 8200 u s e p r o -
2.1 Direct Methods
So far as is known, the only naraware mernoa useo to date to generate square root is a binary equivalent of the paper-and-pencil method everyone learns in grade school. The^ paper-and-pencil^ method^ is^ as^ follows: Pair the digits off both directions from the decimal point. Starting with the left-most pair of digits (or single digit) find-the largest number which, when squared, is less^ than^ the^ digit^ pair.^ Subtract the square^ from^ the^ digit^ pair^ and^ append^ the^ next digitpair. Call^ this^ the^ remainder.^ The^ first digit found is the first digit of the answer. The second digit is determined^ in^ the^ following^ way: Double the answer so far calculated (so far only one digit). Append to that number the^ largest^ digit^ for which the product of the digit and the appended number (i.e., 20 times the answer^ plus^ the^ digit)^ is^ less than the remainder. Subtract that product from the remainder and append the next decimal pair. The remaining^ digits^ are^ calculated^ just^ as^ the second one^ was--finding^ the^ largest^ digit^ which,^ when
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&ded to 20 times the answer and multiplied by the (81it is less than the remainder. The decimal (^) point U after the same digit (^) as the number of digit pairs to the left of the decimal point of the initial number.. An example is^ given^ in^ Fig.^ 2-1^ for^ the^ root^ of^ 62,138. (^2 4) 9 2 6 21 38 oo 4 441 f2 21 1^ -1^76 F9I45 (^38)
1[37^99^64^36 Fig. (^) 2-1 Decimal Square Root. The binary algorithm is quite (^) analogous to the con %Antional (^) decimal technique. It is as follows (^) with example i n Flg. 2-2. Pair the number off 'in bits both (^) ways from the binary point. If (^) the number is in floating point the exponent Must be an (^) even number and the mantissa must be less than one and (^) greater than or equal to 1/4. The first bit of the (^) result must be ones since the first (^) bit pair
Tact one from the first bit (^) pair and append the next
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tha answer is subtracted from the remainder. If it is negative it is added back to the remainder and last answer bit is changed to zero. This is called the restoring
1 0' 2'^1^01 0 1.
- 1 01
- 10 01
- 1. 01 0 01
0 0^11^0101 00 00^^01 01
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then is added,^ rather^ than^ subtracted^ as^ would^ normally
be done.^ This^ process^ saves^ a^ step^ in^ that^ it^ combines the addition^ with^ the^ next^ subtraction^ for^ each^ time^ the number would^ normally^ have^ to^ be^ restored.^ An^ example is given in^ Fig.^ 2-4. 0 0 0
- 1 01
Fig. 2-4 Nonrestoring^ Square^ Root
The nonrestoring algorithm^ has^ been^ used^ more^ due to the fact^ that^ with^ little^ more^ hardware^ it^ is^ sub stantially faster. It^ is^ used,^ for^ example,^ in^ many airborne computers^ such^ as^ the^ Philco^ Transac-l000.^ For either algorithm^ additional^ hardware^ is^ required^ for Sequencing. In addition^ a^ counter^ is^ necessary^ to^ deter nine completion,^ although^ presumably^ if^ a^ hardware "'vision scheme^ is^ implemented^ using^ subtraction^ as^ the terative operator, the^ same^ counter^ can^ be^ used^ for^ both
9 computer uses this method after generating an initial
approximation with^ maximum^ relative^ error^ less^ than 2.6 x lo-^3.^ [3)^ The^ subroutine,^ in^ addition^ to^ requiring the storage of three constants requires over 200 clock periods to generate the initial approximation and^ go through the four Newton-Raphson iterations required. The SDS 930, which uses the polynomial evaluation for single-precision calculations, utilizes the Newton- Raphson iteration for multiprecision work. Only one iteration is necessary, however, for double precision, since the polynomial evaluation has already generated a single precision initial approximation. Eaoh of these methods reveals inherent problems for hardware implementation. The polynomial approxima tion requires a large number of constants, the number of which increases faster than the word length. The Newton- Raphson technique requires a division bn each iteration,which makes the iteration very slow. Division is a very -,low operation. For example, in the CDC 6600 computer it takes 7.25 times as long as an addition and nearly three times as long as a multiplication. It is so slow, even compared to multiplication, that in some of the newer machines [1) it is being performed using multiplication as the itera tire operator Instead of the traditional subtraction.
limited by the division rate.