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logic gate design and programming , Exams of Digital Logic Design and Programming

Northeastern University (NU)Digital Logic Design and Programming

digital logic gate digital logic design digital circuit electronics

Typology: Exams

2016/2017

Uploaded on 01/17/2017

wenshu_huang
wenshu_huang 🇺🇸

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Download logic gate design and programming and more Exams Digital Logic Design and Programming in PDF only on Docsity!

FFER INVERTER input J output input § cutout +> of 3 > a. the input is 1, ! } } If the input is 1, ! 4 then the output wall be 1, then the oulput will be 0 ie input tot [si o ° a 35+ 1 {oo i Wo exgety ene inget is 1, t 1 then the output will be 1. 9 AND inowt | input f outout HAND (Not AND) | inout| tnout f output o 1 o o 1 1 ! Q 0 \ 0 | 1 I 1 1 ' 1 | 9 all inputs are 1, Hall inputs are 1, then the output will be 1 then the output will be 0. cutout ie (Npt input | input output 5 o o 1 ' 9 1 1 C o i 1 i 1 4 1 o It one or more inputs are 4. It one or more inputs are 1, then the output will be 1. then the output will be G.