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Operating Systems Lecture 12: Paging and Segmentation - Prof. B. L. Barnett, Study notes of Operating Systems

An in-depth exploration of paging and segmentation concepts in operating systems. It covers the basics of paging, including page and frame sizes, page table data structures, and page fault handling. Segmentation is also discussed, including the advantages of segmentation and the logical address to physical address translation process.

Typology: Study notes

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Uploaded on 08/19/2009

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CMSC 321:
CMSC 321:
Operating Systems
Lecture 12
Paging and Segmentation
Paging and Segmentation
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Download Operating Systems Lecture 12: Paging and Segmentation - Prof. B. L. Barnett and more Study notes Operating Systems in PDF only on Docsity!

CMSC 321:CMSC 321:

Operating Systems

Lecture 12

Paging and SegmentationPaging and Segmentation

Paging

  • Page:

titi

i^

t^

ll^

l fi

d

i^

h

k

  • process : partition into small, equal fixed-size chunks
    • Frame:
      • RAM : partition into page-sized chunks
        • Page size == Frame size• Page size == Frame size• Fragmentation:

no external

internal only in last page of a process

Address Translation in Paging System

Data Structures NeededData Structures Needed

• Page table

– one per process– associate page w/ frame– pointer to table in PCB

• Frame table

– track free/occupied frames

Advantages of Paging

  • Don’t need contiguous space in RAM• Reduces IF, eliminates EF• Abstract user view of memory from physical• Allow more processes in RAM• Allow more processes in RAM• Protection (bits w/ each page)• Ability to share reentrant code

never changes during execution

  • never changes during execution

Reentrant Code

ProblemProblem

• each reference requires two accesses

    1. index into page table to get frame– 2. then get actual data

l^

d b

f^

t^

f 2

• mem access slowed by factor of 2• solution: translation look aside buffer (TLB)• solution: translation look-aside buffer (TLB)

  • high-speed associative cache– contains MRU page table entries

contains MRU page table entries

  • very fast, expensive

T

LB

  • TLB entries compared simultaneously
    • associative memory: fast!

associative memory: fast!

  • TLB Hit: entry is in TLB

f^

t i

d

i kl

  • frame # retrieved quickly
    • TLB Miss: entry not in TLB
        1. access page table to get frame #– 2. if frame in memory, add to TLB
        • may have to replace… LRU?
            1. if frame not in memory, page fault
            • I/O request to pull from disk• causes process to block• eventually update TLB

Segmentation

g

  • User view of memory:
    • various data structures

procedures

various data structures, procedures

  • no real ordering– don’t care where in RAM these reside
    • Segment: partition of memory
      • similar to page, except…

f

  • size of segments can vary– segment may be dynamic
    • Usually handled by the compiler

Advantages

  • Facilitates natural programming
    • think in terms of data structures, methods, etc.
      • Easy to handle growing data structures
        • rarely know size a priori

rarely know size a priori

  • Programs can be altered/recompiled independently

no need to relink/reload entire set

  • no need to relink/reload entire set
    • Facilitates sharing among processes
      • put data in commonly accessible segment– e.g., graphics libraries
        • Facilitates protection
          • one segment for methods, one for arrays, etc.

Segment Table

  • Typically one per process• Table can be any length• Must be in RAM to be accessed• Each entry contains:

base address of segment in RAM

  • base address of segment in RAM– length of segment in RAM
    • Note: process not partitioned like in paging

Example of Segmentation

Translating an Address

  • extract leftmost

n

bits of logical address

  • extract leftmost

n

bits of logical address

  • use resulting # as index into segment table

gives starting physical address of segment

•^

compare offset (rightmost

m

bits) to length

if >, invalid address!

•^

physical address = base + offsetphysical address

base + offset

•^

e.g.: address 4848

in binary: 0001 | 001011110000

(logical address)

in binary: 0001 | 001011110000

(logical address)

compare offset with length in entry 1 of segment table;then add offset to base from entry 1 of segment table

then add offset to base from entry 1 of segment table

Address Translation