Docsity
Docsity

Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity


Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan


Guidelines and tips
Guidelines and tips

CSCI 4203 Assignment 1 Solutions, Study notes of Computer Architecture and Organization

Fall 2018, Mingyi Hong, Computer Architecture and Design course

Typology: Study notes

2018/2019

Uploaded on 09/03/2019

sam-swanson
sam-swanson 🇺🇸

5

(1)

5 documents

1 / 5

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
CSci 4203 Fall 2018 Assignment 1 Solutions :
Problem 1:
280 x10^6 instructions in total.
Total cycles =( 60*2 + 120*1 + 80*5 +20*1)*10^6 = 660*10^6
For twice as fast, total cycles = 330*10^6
A. Impossible to to reach this speed by speeding up floating point instructions.
B. Load/Store instruction should have CPI of to reach this speed, which is a speedup of 6x.
C. This results in a reduction of execution time by 40%.
Problem 2 :
A. Processor 2
B. 30, 25, 40 Gigacycles, 20, 25, 20 Gigainstructions
C. Execution time = instructions * CPI/ ClockRate
E2 = 0.8 * E1
CPI1*1.2 / ClockRate2 = 0.8 * CPI1 / ClockRate1
ClockRate2 = ClockRate1 * 1.2/0.8 = Clockrate1 * 1.5
So clockrate increases by 50 percent.
Problem 3 :
Part A :
Processor 1 :
C = 2 x DP/(V^2 x F)
= 2 x 90/(1.25^2 x 3.6x 10^9)
= 3.2 x 10^-8 F
Processor 2 :
C = 2 x DP/(V^2 x F)
= 2 x 40 / ( 0.9^2 * 3.4 )
= 2.9048 * 10 ^ -8 F
Part B :
(Snew + Dnew) /( Sold + Dold) = 0.90
Dnew =0.5* C x Vnew ^2 x F
Sold = Vold x I
Snew = Vnew x I
Therefore:
Vnew = [Dnew / 0.5*(CxF)]^0.5
Dnew = 0.90 x (Sold + Dold) - Snew
Snew = Vnew x (Sold/Vold)
pf3
pf4
pf5

Partial preview of the text

Download CSCI 4203 Assignment 1 Solutions and more Study notes Computer Architecture and Organization in PDF only on Docsity!

CSci 4203 Fall 2018 Assignment 1 Solutions :

Problem 1 :

280 x10^6 instructions in total.

Total cycles =( 602 + 1201 + 805 +201)10^6 = 66010^

For twice as fast, total cycles = 330*10^

A. Impossible to to reach this speed by speeding up floating point instructions.

B. Load/Store instruction should have CPI of ⅞ to reach this speed, which is a speedup of 6x.

C. This results in a reduction of execution time by 40%.

Problem 2 :

A. Processor 2

B. 30, 25, 40 Gigacycles, 20, 25, 20 Gigainstructions

C. Execution time = instructions * CPI/ ClockRate

E2 = 0.8 * E

CPI1*1.2 / ClockRate2 = 0.8 * CPI1 / ClockRate

ClockRate2 = ClockRate1 * 1.2/0.8 = Clockrate1 * 1.

So clockrate increases by 50 percent.

Problem 3 :

Part A :

Processor 1 :

C = 2 x DP/(V^2 x F)

= 2 x 90/(1.25^2 x 3.6x 10^9)

= 3.2 x 10^-8 F

Processor 2 :

C = 2 x DP/(V^2 x F)

= 2 x 40 / ( 0.9^2 * 3.4 )

= 2.9048 * 10 ^ -8 F

Part B :

(Snew + Dnew) /( Sold + Dold) = 0.

Dnew =0.5* C x Vnew ^2 x F

Sold = Vold x I

Snew = Vnew x I

Therefore:

Vnew = [Dnew / 0.5*(CxF)]^0.

Dnew = 0.90 x (Sold + Dold) - Snew

Snew = Vnew x (Sold/Vold)

Processor 1 :

Snew = Vnew x (10/1.25) = Vnew x 8

Dnew = 0.90 x 100 -Vnew x 8

= 90 - Vnew x 8

Vnew = [2*(90 - Vnew x 8)/(3.2 x 10^8 x 3.6 x 10^9)]^0.

= 1.18V

Processor 2 :

Snew = Vnew x (30/0.9) = Vnew x 33.

Dnew = 0.90 x (70) - Vnew x 33.

= 63 - Vnew x 33.

Vnew = [ 2(63 - Vnew X 33.33) / (2.9 * 10^-8 x 3.410^9) ] ^ 0.

98.6 * Vnew ^2 = 2*(63 - Vnew X 33.33)

Vnew ~ 0.84 V.

Problem 4 :

addi $t0, $0, 0

beq $0, $0, TEST

LOOP1: addi $t1, $0, 0

beq $0, $0, TEST

LOOP2: sub $t3, $t0, $t

addi $t3, $t3, 5

sll $t2, $t1, 2

add $t2, $t2, $s

sw $t3, ($t2)

addi $t1, $t1, 1

TEST2: slt $t2, $t1, $s

bne $t2, $0, LOOP

addi $t0, $t0, 1

TEST1: slt $t2, $t0, $s

bne $t2, $0, LOOP

Problem 5 :

trylk : li $t1, 1

ll $t0, 0($a0)

bnez $t0, trylk

sc $t1, 0($a0)

beqz $t1, trylk

lw $t2, 0($a1)

3: shift div right 0000000 0

5 1: rem=rem-div 0000000 0

2b: rem<0, rem+div, sll q, q0=

3: shift div right 0000000 0

6 1: rem=rem-div 0000000 0

2b: rem<0, rem+div, sll q, q0=

3: shift div right 0000000 0

7 1: rem=rem-div 0000000 0

2b: rem<0, rem+div, sll q, q0=

3: shift div right 0000000 0

8 1: rem=rem-div 0000000 0

2b: rem>0, sll q, q0=1 0000000 1

3: shift div right 0000000 1

9 1: rem=rem-div 0000000 1

2b: rem>0, sll q, q0=1 0000001 1

3: shift div right 0000001 1

Problem 8 :

For hardware, it takes 1 cycle to do the add, 1 cycle to do the shift , and 1 cycle to decide if we are

done. So the loop takes 3*8 cycles, with each cycle being 4 time units long.

384 = 96 time units for hardware

For a software implementation, it takes 1 cycle to decide what to add, 1 cycle to do the add, 1 cycle

to do each shift , and 1 cycle to decide if we are done. So the loop takes 5*8 cycles, with each cycle

being 4 time units long.

584 = 160 time units for software