Building a Computer: EE 231L Lab 5 | Lab Reports Digital Electronics

EE 231L Fall 2005

EE 231L Lab 5

Building the Computer

Now that you have designed and simulated your computer, it is time to build and test it. You

will build the computer on a printed circuit board which has a socket for an Altera EPF8636ALC84

PLD and a Cypress CY7C128 memory chip. The EPF8636 in programmed in the circuit — you will

not remove the chip and program it at the programming station. (The program in the EPF8636

is stored in volatile memory, so the program is lost when power is removed.) The printed circuit

board has the hardware needed to program the EPF8636 through the parallel port on your lab

computer. Figure 1 shows a diagram of the printed circuit board.

Figure 2 shows the first page of the data sheet for the memory chip you will use. Note that the

memory chip has eleven address lines, while your design has only eight address lines. You should

connect the three unused address lines (A10, A9, and A8) to VCC or ground. You then need to

connect the eight address lines used by the computer (A7-A0), the eight data lines (called I/O 7-0

on the data sheet) and the three control lines — chip select (called CE on the data sheet), output

enable, and write (called WE on the data sheet). (VCC and GND are already connected on the

printed circuit board.)

It will be useful to assign pins on your EPF8636 in order to make the computer easier to build.

Figure 3 shows the computer I built. I assigned Pin 43 to be the Output Enable line, Pin 44 to be

the Write Enable line, Pin 46 to be Data 7, etc. I assigned the pins so that it would be convenient

to wire the EPF8636 to the memory chip. I also assigned pins of the input port so they would be

together, and I could connect the eight input lines to the source of the inputs. To assign pins in

Max+Plus II, you go to the Assign menu, the Pin/Location/Chip sub-menu, and make the pin

assignments there.

When you wire your computer, some of the pins on the EPF8636 are labeled V, G and P. The

pins labeled V have been connected to +5V. Those labeled G have been connected to ground. Those

labeled P are used for programming the EPF8636. Do not connect anything to the pins labeled P.

You can use the pins labeled V or G to connect to the unused address lines of the memory chip.

You should also connect a G pin on the printed circuit board to the ground on your breadboard.

(You will use your breadboard to supply the clock for the computer, and input data.)

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EE 231L Lab 5

Building the Computer

Now that you have designed and simulated your computer, it is time to build and test it. You

will build the computer on a printed circuit board which has a socket for an Altera EPF8636ALC

PLD and a Cypress CY7C128 memory chip. The EPF8636 in programmed in the circuit — you will

not remove the chip and program it at the programming station. (The program in the EPF

is stored in volatile memory, so the program is lost when power is removed.) The printed circuit

board has the hardware needed to program the EPF8636 through the parallel port on your lab

computer. Figure 1 shows a diagram of the printed circuit board.

Figure 2 shows the first page of the data sheet for the memory chip you will use. Note that the

memory chip has eleven address lines, while your design has only eight address lines. You should

connect the three unused address lines (A10, A9, and A8) to VCC or ground. You then need to

connect the eight address lines used by the computer (A7-A0), the eight data lines (called I/O 7-

on the data sheet) and the three control lines — chip select (called CE on the data sheet), output

enable, and write (called WE on the data sheet). (VCC and GND are already connected on the

printed circuit board.)

It will be useful to assign pins on your EPF8636 in order to make the computer easier to build.

Figure 3 shows the computer I built. I assigned Pin 43 to be the Output Enable line, Pin 44 to be

the Write Enable line, Pin 46 to be Data 7, etc. I assigned the pins so that it would be convenient

to wire the EPF8636 to the memory chip. I also assigned pins of the input port so they would be

together, and I could connect the eight input lines to the source of the inputs. To assign pins in

Max+Plus II, you go to the Assign menu, the Pin/Location/Chip sub-menu, and make the pin

assignments there.

When you wire your computer, some of the pins on the EPF8636 are labeled V, G and P. The

pins labeled V have been connected to +5V. Those labeled G have been connected to ground. Those

labeled P are used for programming the EPF8636. Do not connect anything to the pins labeled P.

You can use the pins labeled V or G to connect to the unused address lines of the memory chip.

You should also connect a G pin on the printed circuit board to the ground on your breadboard.

(You will use your breadboard to supply the clock for the computer, and input data.)

2K x 8 Static RAM

CY7C128A

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-

Document #: 38-05028 Rev. ** Revised August 24, 2001

Features

— 15 ns

— 660 mW (commercial)

— 688 mW (military—20 ns)

— 110 mW (20 ns)

static discharge

Functional Description

The CY7C128A is a high-performance CMOS static RAM or-

ganized as 2048 words by 8 bits. Easy memory expansion is

provided by an active LOW Chip Enable (CE), and active LOW

Output Enable (OE) and three-state drivers. The CY7C128A

has an automatic power-down feature, reducing the power

consumption by 83% when deselected.

Writing to the device is accomplished when the Chip Enable

(CE) and Write Enable (WE) inputs are both LOW.

Data on the eight I/O pins (I/O 0 through I/O 7 ) is written into the

memory location specified on the address pins (A 0 through

A 10 ).

Reading the device is accomplished by taking Chip Enable

(CE) and Output Enable (OE) LOW while Write Enable (WE)

remains HIGH. Under these conditions, the contents of the

memory location specified on the address pins will appear on

the eight I/O pins.

The I/O pins remain in high-impedance state when Chip En-

able (CE) or Output Enable (OE) is HIGH or Write Enable (WE)

is LOW.

The CY7C128A utilizes a die coat to insure alpha immunity.

Logic Block Diagram Pin^ Configurations

A 2 A 1 C128A–^1

A 4

A 5

A 6

COLUMN

DECODER

ROW DECODER SENSE AMPS

INPUT BUFFER

POWER

WE DOWN

OE

I/O 0

CE

I/O 1

I/O 2