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3 Questions on Logic Design - Homework 3 | CS 120A, Assignments of Computer Science

University of California-RiversideComputer Science

Material Type: Assignment; Class: LOGIC DESIGN; Subject: Computer Science; University: University of California-Riverside; Term: Winter 2001;

Typology: Assignments

2009/2010

Uploaded on 03/28/2010

koofers-user-pkb
koofers-user-pkb 🇺🇸

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CS/EE 120A
Homework #3 Given 3/6/01. Due 3/13/01
1. Use only 4 CMOS transistors to draw the circuit for the XOR gate. (4)
2. Write the function that eliminates the static hazard(s) in the function F = w'z + xyz' + wx'y. Show your work. (4)
3. Given the following circuit and trace for the inputs of the circuit, draw the trace for the outputs Q and Q'.(4)
S
R
Q
Q'
E
S
R
Q
Q'
E

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CS/EE 120A

Homework #3 Given 3/6/01. Due 3/13/

  1. Use only 4 CMOS transistors to draw the circuit for the XOR gate. (4)
  2. Write the function that eliminates the static hazard(s) in the function F = w'z + xyz' + wx'y. Show your work. (4)
  3. Given the following circuit and trace for the inputs of the circuit, draw the trace for the outputs Q and Q'. (4)

S

R

Q

Q '

E

S R Q Q '

E